An image sensor having a large number of photodetectors arranged in an array on a semiconductor substrate and including a circuit for reading signal charges and an output amplifier on the same substrate has been developed. In remote sensing, a linear image sensor in which photodetectors are arranged in a one-dimensional array is mounted on an artificial satellite or the like and a direction perpendicular to the array is matched with a direction in which the satellite moves, so that a two-dimensional image of the surface of the Earth is photographed.
Though a pixel pitch is desirably minimized in order to improve resolution of an image, a quantity of incident light decreases in correspondence with decrease in area of photodetectors and S/N disadvantageously lowers.
As ingenious measures for improving S/N, a TDI (Time Delay and Integration)-type image sensor has been developed. TDI is a reading technique for improving S/N by employing an FFT (full frame transfer)-type CCD (Charge Coupled Device) which is a two-dimensional image sensor and synchronizing timing of charge transfer with timing of movement of an image of a subject. In the case of remote sensing, a TDI operation can be realized by matching charge transfer in a vertical direction to a moving speed of a satellite. When TDI operations in M stages are performed in a vertical CCD, an accumulation time period increases effectively by M-fold, and hence sensitivity improves by M-fold and S/N improves by AIM-fold.
In many cases, a visible image sensor picks up an image by allowing light to be incident on a chip surface side. Incident light is photoelectrically converted within a silicon substrate and produces signal charges. In the FFT-type CCD, however, light is incident through a polysilicon electrode which controls vertical charge transfer. Therefore, light particularly in a region of a short wavelength is absorbed by the polysilicon electrode and sensitivity disadvantageously lowers.
In order to address this, an image sensor of which sensitivity has been improved by adopting what is called a VPCCD (virtual phase CCD) structure in which some vertical transfer gate electrodes are replaced with virtual electrodes has been proposed. The VPCCD can suppress light absorption in an electrode portion and achieve improved sensitivity by replacing a polysilicon electrode with a virtual electrode.
Japanese Patent Laying-Open No. 2001-102560 (PTD 1) discloses a solid-state image pick-up device aiming to suppress decrease in area of a light reception portion in an individual pixel, to improve pixel density, and to avoid difference in light gathering efficiency or sensitivity of a pixel between two pixel rows adjacent to each other.
In the solid-state image pick-up device in Japanese Patent Laying-Open No. 2001-102560 (PTD 1), a two-dimensional shape of a charge transfer channel for a vertical transfer CCD is meandered, a first transfer electrode and a second transfer electrode are employed as transfer electrodes for the vertical transfer CCD, each of reading gate regions adjacent to an odd-numbered charge transfer channel is formed to be adjacent to a portion where one transfer electrode of the first and second transfer electrodes and a charge transfer channel intersect two-dimensionally with each other, and each of reading gate regions adjacent to an even-numbered charge transfer channel is formed to be adjacent to a portion where the other transfer electrode of the first and second transfer electrodes and a charge transfer channel intersect two-dimensionally with each other.